List of Workshop Attended (2021-2024)
| S. No. | Deptt | Name
|
Date
dd/mm/yyyy |
Details of
Workshop |
Topic |
| 1 | EC | Deepak Jaiswal | 27/09/2021 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 2 | EC | Jay Muleva | 27/09/2021 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 3 | EC | Pranav Kumar Bias | 27/09/2021 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 4 | EC | Ram Choudhary | 27/09/2021 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 5 | EC | Adrija Vishwakarma | 17/09/2021 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 6 | EC | Adrija Vishwakarma | 16/09/2021 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 7 | EC | Abhishekh Singh | 27/07/2022 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 8 | EC | Ram Choudhary | 27/07/2022 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 9 | EC | Pranav Bias | 27/07/2022 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 10 | EC | Abhishek Singh | 27/07/2022 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 11 | EC | Ram Choudhary | 27/07/2022 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 12 | EC | Pranav Bias | 27/07/2022 | Maven Silicon | VLSI SoC Design using Verilog HDL |
| 13 | EC | Akash Bagwan | 01/08/2022-05/08/2022 | AICTE, ATAL Academy, Arm Education and STMicroelectronics | Designing and Modelling of IoT, AI & ML Systems |
| 14 | EC | Surendra Prajapat | 01/08/2022-05/08/2022 | AICTE, ATAL Academy, Arm Education and STMicroelectronics | Designing and Modelling of IoT, AI & ML Systems |
| 15 | EC | Jay Barode | 01/08/2022-05/08/2022 | AICTE, ATAL Academy, Arm Education and STMicroelectronics | Designing and Modelling of IoT, AI & ML Systems |